Appeal No. 2006-1686
Application No. 10/040,055
to be taken based on shape analysis. Since such correction
techniques are not described or suggested by Agrawal, we also
will not sustain the rejection of claims 65-71 and 91-95 under 35
U.S.C. § 102(e).
The examiner contends that certain non-critical features of
Agrawal are to be read as the claimed imperfections (answer-page
6), referring to column 3, lines 4, 5, and 12-16 of Agrawal. To
whatever extent these non-critical features may be considered a
“layout imperfection” (and it is not clear to us that such non-
critical features are such imperfections), Agrawal is clearly
referring to OPC correction in this portion and the claimed
layout imperfections must be of the type that may adversely
affect layout printability or device performance, but may not
necessarily be defects in the sense that the IC layout may still
be electrically correct (see page 2 of the instant specification
for the required definition of “layout imperfection”). The
“layout imperfections” recited in the instant claims result from
the interaction of the rules embodied in such tools as OPC. The
layout imperfections are not something which may be corrected by
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