Appeal 2006-3382
Application 10/461,709
ISSUE
The issue is whether Appellant has shown that the Examiner erred in
rejecting the claims under 35 U.S.C. § 102(b) and 103(a). The issue turns on
a number of specific issues relevant to the limitations of the specific claims.
FINDINGS OF FACT
Concerning the rejection of claims 1-2, 4-5, 7, 14, 17-18, 20-21, 28-
30, 32-34, 37-38, 40-42, 46-51, 53-55, 57-62 under 35 U.S.C.
§ 102(b)(2004) for being anticipated by Goluszek.
1. Appellant has invented a circuit for an improved pulse forming
interleaved current converter. (Specification 1).
2. Examiner has rejected (final) the claims noted above for being
anticipated by Goluszek, which teaches a power converter using
interleaved Buck regulators. (Answer 3).
3. Referring to Figures 3 and 5 of Goluszek, Examiner has read the
claimed first Buck converter circuit on elements switch 60, diode 81
and inductor 65; the second Buck converter circuit on corresponding
elements 70, 78 and 75; a command signal coming from operational
amplifier 108 for establishing an internal reference voltage; means 56
for applying a voltage across the two Buck converters; a capacitor in
parallel with the voltage means on capacitor 76; a synchronization
controller connected to the Buck converters to initiate pulses in
interleaved fashion is read on controllers 102 and 110; and the
unidirectional current pulse as Goluszek’s regulated DC pulse train.
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Last modified: September 9, 2013