Appeal 2006-3434
Application 10/687,907
regions of memory during a computer software optimization. One of
ordinary skill in the art, at the time of the invention, would have readily
recognized that Geva’s suggested approach for invalidating a particular
region in memory would optimize Miller’s invalidation operation by pre-
screening the status bits in the ACAM at initialization. Similarly, we find
that the ordinary skilled artisan would have readily recognized that Hale’s
teaching of securing the invalidating a portion of a cache following a write
back invalidate instruction during initialization would enhance the security
of Miller’s invalidation operation. Consequently, unauthorized codes such
as viruses would not be able to interfere with Miller’s invalidation operation
during the initialization process. After considering the entire record before
us, we find that the Examiner did not err in rejecting claims 3, 6, 9, 13, and
16 over Miller in combination with Geva or Hale.
CONCLUSION OF LAW
On the record before us, Miller anticipates the claimed invention
under 35 U.S.C. § 102 (b) when Miller discloses Miller discloses initializing
all valid status bits to an invalid state. Further, one of ordinary skill in the
art at the time of the present invention, would have found sufficient
motivation under 35 U.S.C. § 103 to combine Geva or Hale with Miller by
incorporating a most recent advanced load instruction for a check instruction
or a specific machine for executing writing instructions in an architecture for
implementing invalid data.
DECISION
We affirmed the Examiner’s decision to reject claims 1-3, 6-13 and
16-18 under obviousness double patenting. We have also affirmed the
Examiner’s decision to reject claims 1, 2, 7, 8, 10 through 12 and 17 through
9
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