Appeal 2007-0665
Application 09/772,986
We affirm-in-part and enter a new rejection pursuant to 37 C.F.R.
§ 41.50(b).
Appellants’ invention relates to a thin film semiconductor device
formed as integrated circuits on an insulating substrate with bottom gate
structured thin film transistors. The bottom gate structure has a gate
electrode, a gate insulating film, and a semiconductor thin film stacked in
the order from below upward. The gate electrode is made of metallic
material having a thickness of less than 100nm while the gate insulating film
has a thickness greater than the thickness of the gate electrode.
(Specification 6-8).
Claim 1 is illustrative of the invention and reads as follows:
1. A thin film semiconductor device comprising:
an insulating substrate; and
a thin film transistor formed on said insulating substrate, wherein
said thin film transistor is formed in a bottom gate structure having gate
electrode, a gate insulating film, and a semiconductor thin film stacked in
the order from below upward, and
said gate electrode is made of metallic material having a thickness of less
than 100nm;
said gate insulating film has a thickness that is greater than said thickness
of said gate electrode.
The Examiner relies on the following prior art reference to show
unpatentability:
Hisao (as translated) JP 10-209467 Aug. 7, 1998
(Published Japanese Patent Application)
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