Ex Parte Clement et al - Page 3

                Appeal 2007-1250                                                                              
                Application 10/458,537                                                                        

                all possible sources of a generated clock included in the circuit.  Appellants                
                contend (Br. 10-11) that Daga's golden timing constraints include clocking                    
                definitions and exceptions, but not all possible sources of a generated clock,                
                as timing constraints and sources of a generated clock are independent and                    
                different concepts.                                                                           
                      The Examiner asserts (Answer 3 and 6) that Daga's generating golden                     
                timing constraints (104), which include clock definitions and exceptions,                     
                "anticipates a reasonably broad interpretation of 'generating a data file                     
                including all possible sources of a generated clock within a circuit.'"  Thus,                
                the issue is whether Daga's golden timing constraints include all possible                    
                sources of a generated clock included in the circuit.                                         
                      Daga (col. 6, ll. 18-24) defines golden timing constraints as the user-                 
                provided clock definitions at the start of the design and the false and multi-                
                cycle paths, or exceptions to single-cycle clocking.  Appellants                              
                (Specification 3: 9-10) define the initial static timing environment data as                  
                including the design constraint file.  Appellants (Specification 3: 4-7) further              
                define the design constraint file as the clock constraints, the design rule                   
                constraints, and timing exceptions such as false and multi-cycle paths.                       
                Therefore, Daga's golden timing constraints correspond to Appellants'                         
                design constraint file, which is part of the initial conditions, and, thus, not to            
                all possible sources of a generated clock.  We find no suggestion in Daga                     
                that, and the Examiner has failed to present a convincing explanation as to                   
                why, the golden timing constraints provide not only the initial constraints,                  
                but also all possible sources of a generated clock within a circuit, as claimed.              
                Accordingly, we cannot sustain the anticipation rejection of claims 1 through                 
                27 over Daga.                                                                                 

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