Appeal 2007-1772
Application 10/672,750
Appellants’ invention is directed to an integrated circuit comprising a
die stack coupled to a substrate. Claims 35, 45, 48, 68, and 70 are
illustrative and reproduced below:
35. An integrated circuit comprising:
a stack comprising at least two semiconductor die, each of the
semiconductor die being coupled together by a first
adhesive, the first adhesive being curable at a first
temperature; and
a substrate coupled to one of the at least two semiconductor die
by a second adhesive, the second adhesive being curable
at a second temperature lower than the first temperature;
wherein each die in the stack of at least two semiconductor die
is electrically functional.
45. An integrated circuit comprising a stack of at least two
semiconductor die, each of the die being coupled to an adjacent die in
the stack by a respective layer of adhesive prior to the stack being
coupled to a packaging substrate, wherein each die in the stack of at
least two semiconductor die is electrically functional.
48. An integrated circuit comprising a stack of at least two
semiconductor die, each of the die being coupled to an adjacent die in
the stack by a respective layer of adhesive prior to the stack being
coupled to a packaging substrate, wherein the stack of at least two
semiconductor die is configured such that the stack comprises a
shingle stack.
68. An integrated circuit comprising:
a stack comprising at least two semiconductor die, each of the
semiconductor die being coupled together by a first
adhesive, the first adhesive being curable at a first
temperature; and
2
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