Appeal 2007-2342
Application 10/884,654
Fig. 2) by adding a step comprising filling the cavity on the underside of its
interposer with an encapsulant.
Appellant admits that the electronics package is prior art (Spec. 3: 1-
25; Answer 3). The admitted difference between the prior art and the
electronics package made by the claimed method is that the latter comprises
a manufacturing step in which its pin cavity is “substantially fill[ed]… with
an encapsulant… while not overflowing the cavity… with the encapsulant…
such that the interposer… is capable of withstanding a mechanical load
generated by thermal elements and is incapable of withstanding the
mechanical load without the encapsulant….” (Br. 6). Figs. 2 and 3 of the
instant application, illustrating this admitted difference, are reproduced
below:
Fig. 2 shows the prior art electronics package; Fig. 3 shows an electronics
package produced by a method of the claimed invention. The cavity is
labeled “27”; the encapsulant is shown as “39.”
Wakashima is cited by the Examiner for its teaching of a
semiconductor package comprising a gap located on the underside of a
substrate 2 which is filled with a resin base 4 (Wakashima, Abstract; Answer
4). Figs. 2C and 2D of Wakashima are reproduced below.
4
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Last modified: September 9, 2013