Appeal No. 96-0523
Application 07/910,763
DECISION ON APPEAL
This is a decision on appeal under 35 U.S.C. § 134 from
the final rejection of claims 1-12, all of the claims pending
in the application. The amendment after final rejection
received October 27, 1994, has not been entered.
We affirm-in-part.
The disclosed invention is directed to a method and
apparatus for applying test signals or voltage to integrated
circuit chips while the chips are still part of the wafer.
Claim 1 is reproduced below.
1. A semiconductor wafer, comprising:
a plurality of semiconductor chips formed in said
semiconductor wafer;
a pair of supply and ground pad electrodes formed on
each of said semiconductor chips;
a pair of external supply and ground terminal
electrode pads formed on an outer peripheral portion of
said semiconductor wafer; and
a power supply bus line and a ground bus line which
are made of the same material as said pad electrodes,
which are formed on said semiconductor wafer and which
respectively interconnect said external supply and ground
terminal electrode pads and each of said supply and
ground pad electrodes on each of said semiconductor chips
for simultaneously supplying an identical signal or
voltage to all of said semiconductor chips on said
semiconductor wafer.
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