Ex parte NISHINO - Page 6




          Appeal No. 96-0523                                                          
          Application 07/910,763                                                      

          claims 1 and 8 and are "external supply and ground terminal                 
          electrode pads on an outer peripheral portion of said                       
          semiconductor wafer," as recited in claim 12.  Stopper shows                
          power grid bonding pads 8 at the edge of the chip in figure 5               
          (col. 4, line 12; col. 12, approx. lines 29-37, discussing                  
          putting pads for voltage and ground at the side of the chip)                
          which are "supply and ground pad electrodes" on each of the                 
          die.  Stopper does not expressly show the power grid connected              
          to voltage and ground pad electrodes on the individual chips;               
          however, it would have been obvious to one of ordinary skill                
          in the art to interconnect the rails of the power grid to the               
          voltage and ground pad electrodes because that is the way                   
          power is supplied to the chip.                                              
               Because the two rail power grid connects all of the                    
          individual die on the wafer together, see figure 4, the grid                
          is used "for simultaneously supplying an identical signal or                
          voltage to all of said semiconductor chips on said                          
          semiconductor wafer," as recited in claim 1.  Appellant argues              
          "that neither of Stopper et al. nor Quinn et al. provide an                 
          arrangement via which the very same voltage or signal could be              
          simultaneously supplied to each of die or chip on the wafer in              

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