Appeal No. 96-0523
Application 07/910,763
Claims 2-5, 9, and 10
Claims 2 and 9 require fuse means interposed between one
of the power supply bus means and the ground bus means and one
of the chips. The examiner relies on Quinn to show a fuse
(Examiner's Answer, page 4). Quinn discloses that redundant
or optional circuits can be connected or disconnected by
blowing fuses by a laser or electrically using additional
contacts (col. 6, lines 48-64). While it is true that the
fuses in Quinn can be burned out electrically by an excess
current, Quinn does not disclose disposing fuses between the
power supply bus and a chip or between the ground bus and a
chip. The examiner states that the "claims are directed to a
semiconductor structure no matter how actually made, therefore
the manner by which the chips have been isolated does not
distinguish over the prior art" (Examiner's Answer, page 5).
However, the claims recite a specific location for the fuse
which is not addressed. In our opinion, the examiner has
failed to establish a prima facie case of obviousness because
the rejection does not address the location of the fuse
elements recited in claims 2 and 9. The rejection of claims 2
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