Ex parte NISHINO - Page 5




          Appeal No. 96-0523                                                          
          Application 07/910,763                                                      

          "a plurality of semiconductor chips . . . on a single wafer,"               
          as recited in the preamble of claim 12.  None of the                        
          independent claims require that the wafer be cut into                       
          individual die and so appellant's arguments that Stopper                    
          teaches away from cutting the wafer into individual die                     
          (Brief, pages 5-6) are not persuasive because they are not                  
          commensurate in scope with the claims.                                      
               Figures 4 and 5 of Stopper show a power grid 11 with a                 
          rail system.  "In a rail system, each cell is crossed by both               
          rails three times in both the horizontal and vertical                       
          directions.  The power rails are connected to a pair of                     
          contact pads 12 in each power hookup area 5."  Col. 4,                      
          lines 7-10.  "[T]he power hookup areas may be provided in the               
          space at the 'corners.'"  Col. 4, lines 64-65. The two rails                
          in Stopper constitute "a power supply bus line and a ground                 
          bus line" as recited in claim 1 and "a power supply bus line                
          means and a ground bus line means" as recited in claims 8 and               
          12.  The pair of contact pads in the power hookup area 5 at                 
          the corners which are connected to the rails are "external                  
          supply and ground terminal electrode pads formed on an outer                
          peripheral portion of said semiconductor wafer," as recited in              

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