Ex parte NISHINO - Page 7




          Appeal No. 96-0523                                                          
          Application 07/910,763                                                      

          a manner to test the status of the circuitry in each of the                 
          dies or chips, after the chips had been exposed to a burn-in                
          test or the like" (Brief, page 10).  However, claim 1 requires              
          only supplying an identical voltage to all the semiconductor                
          chips, which is performed by the power grid in Stopper.  Claim              
          1 does not require testing.  Appellant has not persuaded us                 
          that the language of claim 1 defines over Stopper.  The                     
          rejection of claim 1 is sustained.                                          
               Stopper states that "the power hookup areas may be                     
          provided in the space at the 'corners'" (col. 4, lines 64-65;               
          see the power hookup area 5 in figure 4).  Therefore, Stopper               
          discloses placing the external terminal electrode pads in an                
          isolated peripheral area of the wafer as recited in claim 6.                
          Appellant's argument that neither of the references can be                  
          relied on to teach such a remote arrangement (Brief, page 14)               
          is not persuasive because it does not address the clear                     
          teachings of Stopper.  The rejection of claim 6 is sustained.               
               Figures 4 and 5 of Stopper show the power supply and                   
          ground grids crossing over each other.  It would have been                  
          apparent to one of ordinary skill in the art that the grids                 
          must be insulated from each other at the point where they                   

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