Appeal No. 95-1527
Application No. 07/862,066
difference between Lam’s disclosure and the subject matter of
Claim 1. Lam’s read-out circuit in Figure 2 includes:
first selecting means (word line select transistor
74);
first data storing means (latch 92/94/96/98);
transferring means (transfer gate 148);
second data storing means (latch 126/128/130/132);
second selecting means (transfer gate 150); and
presetting means (precharge transistor 78).
Those means as disclosed by Lam fully perform all the recited
functions and are equivalent to Appellant’s disclosed means
which include:
first selecting means (word or column select
transistor Qc);
first data storing means (latch F.F.D.);
transferring means (transfer gate Qt);
second data storing means (latch F.F.S.);
second selecting means (transfer gate Qy); and
presetting means (precharge transistor Qp).
Because Lam fully discloses the claimed invention, we cannot
agree with Appellant’s argument that Lam lacks the recited
first selection means in the claimed combination.
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