Ex parte THIEL - Page 3




          Appeal No. 95-3798                                                          
          Application 08/063,968                                                      

          The appellant has stated (Br. at 5) that claims 1-7 stand or fall           
          together and claims 8-16 stand or fall together.                            
                                    The Invention                                     
               The invention is directed to a circuit which may be used as            
          a comparator.  It includes a differential input stage having a              
          pair of transistors arranged in differential mode and a pair of             
          transistors arranged in current mirror mode.  It also includes a            
          hysteresis stage which has a conductance path coupled in parallel           
          to the conductance path of one of the current mirror transistors            
          and which is responsive to the conductance state of one of the              
          differential mode transistors for enabling current through the              
          hysteresis stage.                                                           
               Claims 1 and 8 are independent claims.  All other claims are           
          dependent claims.  Claim 1 reads as follows:                                
                    In combination:                                                   
                    a first pair of transistors configured in a                       
               differential mode;                                                     
                    means for providing constant current into the                     
               conductance paths of said pair of differential                         
               transistors;                                                           
                    a second pair of transistors configured in a current              
               mirror mode, the conductance paths of said current                     
               mirror transistors individually coupled to the                         
               conductance paths of said differential mode                            
               transistors;                                                           
                    an hysteresis stage having a conductance path                     

                                         -3-                                          





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