Appeal No. 95-4084
Application 07/992,648
This is an appeal from the final rejection of claims 1
and 2. In an Amendment After Final (paper number 14), claim 1
was amended.
The disclosed invention relates to a coefficient data change
processing method for a digital signal processor of a pipeline
system that has a coefficient address pointer independent of a
program counter, and that transfers and supplies a processing
program and coefficient data from a microprocessor during read
cycle steal operating processes. According to appellants, the
read cycle steal processes for transferring coefficient data are
spread out across three machine stages (i.e., fetch, decode and
execute), rather than the single stage (i.e., execute) of the
prior art.
Claim 1 is the only independent claim on appeal, and it
reads as follows:
1. A coefficient data change processing method for a digital
signal processor of a pipeline system which has a coefficient
address pointer independent of a program counter, and transfers
and supplies a processing program and coefficient data from a
microcomputer, said method comprising the steps of:
discriminating whether an instruction is a read instruction
of said coefficient data at which a read cycle steal should be
executed from a value of said program counter;
when said instruction is a read instruction, transferring
new coefficient data during an instruction read stage and an
instruction decode stage in a processing unit to a transfer
buffer from said microcomputer; and
2
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