Appeal No. 95-4084 Application 07/992,648 transferred to program RAM 19, and the coefficient data is transferred to the transfer buffer 27. After transferring the coefficient data to the transfer buffer, the microcomputer issues a data change-over command and an initialization command to the sequence controller 18. In response to the data change-over command, the sequence controller 18 issues a predetermined instruction signal to the memory control circuit 34 to write the coefficient data group in the transfer buffer 27 into a predetermined area of the coefficient data RAM 10. The microcomputer thereafter cancels the muted condition, and the newly written coefficient data is read from the coefficient data RAM 10 to the buffer memory 7 to start the new sound field. In view of the foregoing coefficient data transfer operation in Yamaki, we agree with appellants: that the method of transferring new coefficient data in Yamaki is completely different from the method of transferring new coefficient data in claim 1; that Yamaki is not concerned with read cycle steal; and that the claimed three stages of transferring new coefficient data to a coefficient data memory are not addressed by Yamaki. We agree with the examiner (Answer, page 4) that Garrett discloses a cycle steal sequencer. Even if we assume for the sake of argument that the skilled artisan would have found it 5Page: Previous 1 2 3 4 5 6 7 8 NextLast modified: November 3, 2007