Appeal No. 95-5012
Application 08/076,876
with the examiner that such structure is connected in a computer
system in the manner required by the claims on appeal. For
example, Pohlman does not have a multiplex system controller
means with a multiplex control bus connected to the memory
input/output means and the input/output means for time sharing
the address bus of the CPU in order to sequentially transfer
groups of at least address and data information. If such a
multiplex system controller is not in Pohlman’s system, then
Pohlman cannot have a “state machine means coupled to said
multiplex control bus means and to said CPU control bus for
controlling said multiplex system controller means,” and “address
latch means coupled to said state machine means and to said
address bus for temporarily storing address information” (Claims
1 and 19) (Brief, page 9).
Even if we assume for the sake of argument that it would
have been obvious to one of ordinary skill in the art to modify
Pohlman in accordance with Baker to use a plurality of
multiplexers in lieu of a single multiplexer (Final rejection,
page 6), we are still left with the fact that the combined
reference teachings would still lack the specifically claimed
computer structure set forth in the claims on appeal. Thus, the
obviousness rejection is reversed.
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