Appeal No. 96-0439
Application 07/956,497
admitted prior art shown in Figures 9 and 10 and Nakatani,
together or individually, fail to teach or suggest “a third
outlet-terminal group including a plurality of scanning-signal
outlet terminals disposed along the second side of the
semiconductor chip and arranged to the segment-signal outlet
terminals at the second side of the semiconductor chip at
predetermined intervals and respectively electrically
connected to corresponding output nodes of the scanning signal
outputting means” as recited in Appellant’s claim 1. In
particular, Appellant argues that all that Nakatani suggests
as a modification of the prior art semiconductor shown in
Figures 9 and 10 is the use of multiple semiconductor devices
with leads bent in various different directions or the
replacement of the printed circuit board including crossovers
with an even more complex printed circuit board such as that
illustrated in Nakatani’s Figure 4. Appellant argues that
Nakatani simply contains no discussion or suggestion that
would have led those skilled in the art to modify the prior
art Figures 9 and 10 to obtain the Appellant’s invention.
The Examiner argues on page 3 of the answer that Nakatani
teaches “a third outlet-terminal group” as recited in
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