Ex parte KINOSHITA - Page 2




          Appeal No. 95-3159                                                          
          Application No. 08/064,678                                                  


               The disclosed invention relates to a multiprocessor system             
          that has a plurality of processors, a main memory common to the             
          plurality of processors, and an access control means coupled                
          between the plurality of processors and the main memory.  Each of           
          the processors includes a plurality of vector calculation units.            
          During system execution of a vector calculation, the access                 
          control means selectively changes the number of active vector               
          calculation units in each of the processors in accordance with              
          the vector calculation, and the access control means                        
          independently enables the active vector calculation units to                
          access the main memory to thereby execute the vector calculation            
          by use of the active calculation units in a pipeline fashion.               
               Claim 1 is illustrative of the claimed invention, and it               
          reads as follows:                                                           
               1.  A multiprocessor system comprising:                                
               a plurality of processors, each of said processors including           
          a plurality of vector calculation units, each of said vector                
          calculation units executing a vector calculation in a pipeline              
          fashion;                                                                    
               a main memory common to said plurality of processors;                  
          and                                                                         
               access control means coupled to said vector calculation                
          units in said processors, respectively, and to said main memory             
          for individually controlling said vector calculation units in               
          each of said processors to selectively change the number of                 
          active vector calculation units in each of said processors in               
          accordance with a vector calculation to be executed and to                  
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