Appeal No. 95-3900 Page 6
Application No. 07/978,030
circuit substrate 23, and spacers 63 and 64. The examiner
identifies foam layer 62 as the upper plate with holes.
Appellants never specifically challenge this finding (see
Paper 23 (App. Br.) at 3). We agree with the examiner's
rejection subject to the following amplification. Rammos'
claim 11 (with its antecedents) teaches the use of an upper
plate ("layer of conductive material formed on and supported
by said sheet of dielectric material", claim 1) in conjunction
with "means ... for forming cavities" (claim 11) and the use
of apertures in the spacer dielectric materials (claims 4
and 10). Moreover, Rammos contemplates a cavity depth
measured from the upper conductive layer of approximately one
quarter wavelength (Claim 1). See In re Geisler, 116 F.3d
1465, 1469-70, 43 USPQ2d 1362, 1365 (Fed. Cir. 1997) (A
claimed range may be obvious in view of a close prior art
value absent unexpected results or a teaching away.) Even if
Rammos used exactly one-quarter wavelength, once the thickness
of the sheet of dielectric material is factored in, the depth
of the cavity from the printed patterns will be less than one-
quarter wavelength. Consequently, we affirm the rejection of
showing on the record before us.
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
Last modified: November 3, 2007