Ex parte BALISTRERI et al. - Page 4




          Appeal No. 97-0614                                                          
          Application No. 08/212,465                                                  


          row address decoder 18, and data and address buses D0-D7, A0-A8             
          are connected with the memory arrays.                                       
          The Rejection under 35 U.S.C. §102                                          
          Claims 1-12                                                                 
                    Appellants have not specifically argued the                       
          patentability of any specific dependent claim, indicating how it            
          defines appellants' invention over the prior art.  Accordingly,             
          appellant's claims stand or fall together.  In re Nielson, 816              
          F.2d 1567, 2 USPQ2d 1525 (Fed. Cir. 1987).                                  
                    After consideration of the positions and arguments                
          presented by both the examiner and the appellants, we have                  
          concluded that the rejection should not be sustained.                       
                    There is but one issue in this case.  The examiner                
          contends that two or more memory arrays 2 of Pinkham may be                 
                                        2                                             
          considered as one memory plane .  Appellants argue that Pinkham             
          does not disclose a plurality of memory planes with the planes all          
          fabricated on a single semiconductor substrate.                             




          2 The designation “N” in “N memory arrays” which is in the claims           
          is not defined in the claims.  Accordingly, it is presumed that             
          “N” may be 1.                                                               
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