Appeal No. 95-3885
Application 08/172,051
Shockley teaches in column 4, line 70, through
column 5, line 7, that Figure 5 shows a resistive layer 35 and
a pn junction. However, Shockley shows in Figure 5 that the
resistive layer 35 is not below the pn junction but placed on
the exposed surface of the device. Also, see column 14, lines
53-54, and lines 74-75. Shockley teaches in column 1, lines
12-26, that a serious limitation exists in the power handling
capacity
of many semiconductor devices due to thermal instability.
Shockley further teaches that the thermal instability results
in an unstable mode in which the current density increases in
one localized region which results in localized heat buildup
in this region of the device while the total external current
remains substantially constant. Shockley states that these
hot spots result in damage or destruction of the device.
In column 2, line 58, through column 4, line 39,
Shockley explains in detail the problem by referring to
schematic circuits shown in Figures 1 and 2 and the
theoretical curves for the current voltage characteristics of
8
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