Appeal No. 96-1247
Application 08/115,662
through 122-N and fails to show that the interconnections in
the regions that these adjusting circuits provide are designed
such
as to minimize skew. Turning to column 2 of Deyhimy, we find
that Deyhimy states that the variable delay elements 120 and
122 are added to the clock distribution circuit as a prior art
known method of eliminating skew between clock outputs.
Deyhimy discloses that the components of the computer system
have been assembled onto a printed circuit board and that the
delay elements 120 and 122 are adjusted to add delay so that
the skew between the master clock output 104 is nearly
eliminated. Deyhimy further discloses in column 2, lines 36-
41, that Figure 3's conventional adjustment procedure is
very time consuming and is also prone to inaccuracy. Deyhimy
does not teach or suggest that Figure 3 adjusts the skew or
eliminates the skew by designing the printed circuit boards
such that skew is minimized in the circuit board region. In
fact, Deyhimy does not seek this solution to the problem.
Deyhimy's invention is directed to adjusting the clock
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