Ex parte HELLER et al. - Page 5




          Appeal No. 96-3697                                                           
          Serial No. 08/255,304                                                        




          a a (J-1>K>0) may comprise the global bits identifying theJ-1… K                                                                      
          processor, and bits in bit locations a a are local address                   
                                                 K-1… 0                                
          bits identifying the particular storage location.  The                       
          complete address would be represented by bits in bit locations               
          aJ-1…a  aK K-1… 0.a                                                                  
                    During data processing, it may be necessary to                     
          reassign the data among the various processors’ storage                      
          locations in a selected way by a rearrangement of address bits               
          among the various address bit locations.  For example, a                     
          transpose operation would be represented by interchanging                    
          global address bits and local address bits.  The addresses for               
          the transposed data would be a …a  a …a .K-1 0 J-1  K                                   













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