Appeal No. 1996-4200
Application No. 08/330,341
type], and only transistor 4 disclosed by Liepold has a bulk
terminal connected to the second terminal for the supply
voltage. Although the gate and drain terminals of transistor
1 in Leipold are interconnected, the gate terminal of
transistor 3 is not interconnected to either the source
terminal or the drain terminal.
The examiner is of the opinion (Answer, page 3) that it
would have been obvious to one of ordinary skill in the art to
substitute the four n-type FETs of Van Zeghbroeck in the
Leipold comparator "since to switch the CMOS inverter of
Leipold et al with inverter 26 of Van Zeghbroeck, and also to
switch the diode-connected CMOS transistors 1, 2 of Leipold
with the two n-type FETs 30, 31 of Van Zeghbroeck would enable
a less complex manufacturing process for the Leipold et al
comparator circuit." For additional justification for the
modification, the examiner notes (Answer, page 4) that "the
references have corresponding structures," that "the two
references are directed to a similar technological field," and
that "the FETs 30 and 36' in Van Zeghbroeck are depletion type
FETs, whereas the FETs 31 and 37 are enhancement type FETs
(similar to appellants’ FETs 1, 3 and 2, 4)." With respect to
4
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