Appeal No. 97-0266
Application No. 08/176,370
of said each instruction in a storage buffer, each instruction
further associated with a destination location designator
indicating a storage location in the storage buffer of the
result of the execution of said each instruction, wherein each
of at least one dependent instruction of the plurality of
instructions is dependent upon at least one source instruction
of the plurality of instructions such that at least one source
operand location designator of the at least one dependent
instruction is identical to a corresponding destination
location designator of the at least one source instruction,
the at least one source operand location designator of the at
least one dependent
instruction being stored in a memory device of the processor,
the memory device including a content addressable memory for
storing the source operand location designators of the at
least one dependent instruction as tags of the content
addressable memory, a method for determining the availability
of a source operand of a dependent instruction for dispatch of
the dependent instruction to an execution unit, the method
comprising the steps of:
receiving a first destination location designator of a
first result, the first result being the result of the
execution of a first source instruction by a first execution
unit;
determining a first condition, the first condition being
whether the received first destination location designator is
identical to any of the stored source operand location
designators of the at least one dependent instruction, each
dependent instruction that satisfies the first condition
thereby being a dependent instruction that will have at least
one source operand available for dispatch of the dependent
instruction to an execution unit, wherein said determining
step comprises the step of:
associatively comparing the first destination location
designator with the stored source operand location designators
of the dependent instructions to determine which of the
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