Appeal No. 97-0266
Application No. 08/176,370
a content addressable memory, for claims 1 and 16 (Brief, page
13), that the combination of references fails to suggest
"setting a source valid bit corresponding to the source
operand, thereby indicating that source operand is available"
once the first
condition is met, as recited in claim 4 (Brief, page 15), and
that the cited art fails to teach that the two claimed source
instructions are executed within the same clock cycle of the
processor, for claim 6 (Brief, page 16). However, since we
have found a defect in the rejection that is applicable to all
of the claims, we will not address individual arguments for
each of the proposed eighteen groups remaining after the
examiner's allowance
of claims 18, 19, 32 through 34, and 41 through 43.
CONCLUSION
The decision of the examiner rejecting claims 1, 3
through 17, 20 through 31, and 35 through 40 under 35 U.S.C. §
103 is reversed.
REVERSED
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