Appeal No. 1997-0278
Application No. 08/367,917
11, 12 and 14 stand rejected under 35 U.S.C. § 103 as being unpatentable over Sato in
view of Lee and Yamamoto.
Rather than reiterate the conflicting viewpoints advanced by the Examiner and the
appellants regarding the above-noted rejections, we make reference to the Examiner's
answer (Paper No. 14, mailed July 19, 1996) for the Examiner's complete reasoning in
support of the rejections, and to the appellants’ brief (Paper No. 13, filed May 17, 1996) for
the appellants’ arguments thereagainst.
OPINION
In reaching our decision in this appeal, we have given careful consideration to the
appellants’ specification and claims, to the applied prior art references, and to the
respective positions articulated by the appellants and the Examiner. As a consequence of
our review, we make the determinations which follow.
Appellants argue that Sato does not teach the discharge of a high voltage,
approximately 7-12 volts, at a node across a low voltage transistor to ground as set
forth in independent claims 1, 3, 6, 11 and 16. (See brief at page 6.) Appellants also
argue that the 5 volts taught by Sato is not approximately 3 or 7 volts with reference to a
low voltage circuit or switch. (See brief at page 6.) We agree with appellants. The
language in each of independent claims 1, 3, 6, 11 and 16 includes a limitation in varied
scope pertaining to the biasing of the transistors to allow the two transistors to
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