Appeal No. 1997-0278
Application No. 08/367,917
discharge 7-12 volts without damaging the low voltage circuit. (See brief at page 6.) Sato
does not teach or suggest this claimed transistor configuration and biasing thereof as set
forth in claims 1, 3, 6, 11 and 16 and we will not sustain the rejection of these claims.
The Examiner further includes Lee to teach the common source and drain of the two
transistors with the motivation “to reduce transistor area.” (See answer at page 5.)
Appellants argue that Lee teaches away from the present invention. (See brief at page 7.)
We disagree with appellants with respect to teaching away, but agree that Lee does not
teach or suggest those features or motivations lacking in Sato. Appellants argue that
“Appellants’ invention uses an extended N- doped well to create a gradual junction,
between the drain and substrate region. Appellants’ gradual junction combined with
Appellants’ biasing means allow Appellants’ device to withstand relatively large voltage
differences.” (See brief at page 8.) We agree that Lee is not
concerned with the formation of a gradual junction or biasing two transistors to discharge a
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high voltage to ground. Therefore, Lee does not supply the deficiencies of Sato.
Therefore, we will not sustain the rejection of claims 1-6, 9-10 and 16-17.
2We note that Sato suggests to the skilled artisan to use a gradual junction with low impurity
concentration to “absorb part of the voltage applied between the source and drain.” (See Sato at col. 2.)
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