Appeal No. 97-0320
Application No. 08/096,261
detects defective memory cells; and
an output circuit means, operably coupled to said
defective cell position storage circuit means, for converting
position information indicating positions of said word lines
or bit lines connected to said defective memory cells stored
in said defective cell position storage circuits into serial
data and for outputting converted position information so that
said positions of said word lines or bits connected to said
defective memory cells can be determined and thereafter
replaced.
The Examiner relies on the following references:
Müller et al. (Müller) 5,123,016 Jun. 16, 1992
Mizuno et al. (Mizuno) 5,357,473 Oct. 18,
1994
(effectively filed Jun. 20,
1991)
Claims 1 and 3 are rejected under 35 U.S.C. § 103 as
being unpatentable over Müller in view of Mizuno.
Rather than reiterate the arguments of Appellant and the
Examiner, reference is made to the Briefs and Answer for the 2
respective details thereof.
OPINION
We have carefully considered the subject matter on
2The Appeal Brief was filed February 8, 1996. In
response to the Examiner's Answer dated March 19, 1996, a
Reply Brief was filed May 20, 1996 which was acknowledged and
entered by the Examiner without further comment on July 29,
1996.
3
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