Appeal No. 97-0320
Application No. 08/096,261
reference at column 8, lines 18-24 states:
When, by contrast, it is repairable,
then the memory module can be repaired
according to the repair plan (Step 10),
whereby the repair can ensue externally
or internally with the test processor
when the replacement rows or replacement
columns are programmable by the test processor.
Thus, while a portion of Müller's disclosure (column 3, lines
10-14) indicates a preference for internal repair with the
test processor, an external repair alternative is clearly
contemplated. We do note, as the Examiner does, that Mizuno
does not explicitly disclose any particular output circuitry
such as the presently claimed output data serialization
feature for implementing such external repair procedure. It
is precisely this deficiency, however, that the Examiner seeks
to address with the addition of Mizuno. The Examiner points
to the disclosure of Mizuno (column 10, lines 59-68 and Figure
3) which describes the output of memory defect data through a
serial port to an external computer 17 which in turn executes
the memory repair. The Examiner (Answer, pages 3 and 4),
suggests several advantages of off-chip memory defect analysis
and repair and concludes that one of ordinary skill would have
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