Appeal No. 1997-1060
Application No. 08/172,848
sequentially addressing selected cells of the device;
changing the state of at least one device output if a
redundant line has been addressed.
37. A method of testing a semiconductor device to
determine whether redundancy implementation has occurred on
redundant elements within the semiconductor device, the method
comprising the steps of:
configuring the device in at least one test a [sic] mode;
sensing a programmed signal indicating whether redundancy
has been implemented on the device; and
changing the state of at least one device output when the
first signal has a predetermined value, wherein whether
redundancy implementation of redundant elements in the
semiconductor memory device is indicated by the changed state
of the at least one device output.
The prior art relied upon by the examiner is:
Saito et al. (Saito) 4,860,260 Aug. 22,
1989
The appealed claims stand rejected under 35 U.S.C. § 102
or § 103 as follows:
a) claims 1-6, 11-15, 28-33 and 37-40 under 35 U.S.C. §
102 (b) as being anticipated by Saito; and
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