Ex parte SHAH et al. - Page 8




          Appeal No. 97-2470                                         Page 8           
          Application No. 08/201,817                                                  


          first bus upon receipt of the retry signal.  A bus arbiter                  
          includes logic for receiving the busy signal and preventing                 
          any bus master seeking access to the second bus from                        
          participating in arbitration for control of the first bus                   
          until the busy signal has been negated.  Col. 2, ll. 55-68.                 


               The reference further teaches, “[u]pon negation of the                 
          busy signal, all bus masters will be permitted to compete for               
          ownership of the bus.”  Id. at ll. 52-54 (emphasis added).                  
          Heil does not provide an interval during which a bus master on              
          the secondary bus is denied access to the secondary bus after               
          negation of the busy signal, i.e., after the second bus is                  
          relinquished.  The absence of the claimed circuitry for                     
          providing an interval from the reference negates anticipation               
          of  independent claims 1 and 6 and their dependent claims 2                 
          through 5 and 8 through 10, respectively.                                   


               Similar to claims 1 and 6, the other independent claims;               
          viz., claims 11 and 15, 18, and 21; specify a timer circuit,                
          means for providing an interval, and a step of precluding a                 
          bus master, respectively.  These limitations similarly are not              







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