Appeal No. 1997-0166
Application No. 08/409,933
includes making the film (5) 18µm in thickness. However, even thoughYabe teaches away from utilizing
a polyimide film that is 2-5 µm in thickness, Yabe nevertheless establishes that it would have been
obvious to have made the polyimide layer about 4-5µm in thickness. While it may be a step backward
in the art, it still would have been well within the level of skill to one of ordinary skill in the art as
disclosed by Yabe. Accordingly, the rejection of claims 9, 19 and 23 under 35 U.S.C. § 103 is also
affirmed.
Turning now to independent claims 16 and 26, these claims are similar to claims 17 and 21 and
additionally require, inter alia, a passivation film covering a surface of the semiconductor substrate and
a surface of the electrode pad. Additionally, claim 16 calls for the resin film (6) to cover a surface of
the semiconductor substrate (1) except at a top area of the bump electrode (5a). Claim 26 additionally
calls for the resin film to be disposed on the passivation film (3) and having an opening positioned above
the opening of the passivation film. Appellants’ position is that film (6) of Yabe is not disposed on an
electrode pad, and that in Merrin, even if glass layer (19) were considered to be a passivation film and
to be disposed on a semiconductor substrate, that there is no suggestion or motivation for combining
with Yabe. We find that in Yabe, second surface protection film (6), composed of silicon nitride or
SiO , is a passivation layer located on the semiconductor substrate except in the area surrounding the
2
bump electrode (4) and the edge of the chip (1). In Yabe, as stated supra, the polyimide first surface
protection film (5) surrounds chip (1) and includes powdered SiO around the bump electrode (4) to
2
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