Appeal No. 1997-2439
Application 08/417,701
bus. The Examiner further argues that the assignment and use of memory addresses and I/O addresses
is inherent to the operation of the computer system. On page 6 of the answer, the Examiner states that
Frieder does not disclose that the first I/O interface circuit includes means for translating addresses
during accesses to the first addresses assigned to the first I/O bus by the computer system from the
memory and I/O addresses assigned to said first I/O bus by the computer into the addresses of the first
set of fixed addresses associated with said second I/O bus and that the second I/O interface circuit
includes means for translating addresses during accesses to the second set of addresses assigned to said
second I/O bus by the computer system from memory and I/O addresses assigned to said second I/O
bus by the computer system into addresses of the second set of fixed addresses associated with said
second I/O bus. The Examiner agues that Johnson discloses means for translating these addresses and
that it would be obvious to employ the Johnson translators into the Frieder's system.
On pages 4 and 5 of the reply brief, Appellants pointed out that if the Frieder's set of addresses
associated with the first bus is equivalent to a first set of fixed addresses and the Frieder's set of
addresses associated with the second bus is equivalent to a second set of fixed addresses then the two
sets of addresses would not be the same. Appellants argue that if they were the same, the computer
system as disclosed by Frieder could not properly operate, since the computer system does not include
an identifying means or a translating means to be able to distinguish between the two sets of addresses.
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