Ex parte ISHIDA et al. - Page 4




               Appeal No. 1997-3166                                                                                               
               Application No. 08/509,638                                                                                         


               of the disclosure.  (See Answer, page 3.)  Appellants argue that the reference does not disclose the               

               physical layout of the device, but merely a schematic diagram of the circuitry, and that limitations in            

               independent Claims 15 and 21 reciting physical placement of the semiconductor elements are thus not                

               anticipated.  (See Brief, pages 4-5.)                                                                              

                      “Anticipation is established only when a single prior art reference discloses, expressly or under           

               principles of inherency, each and every element of a claimed invention.”  RCA Corp. v. Applied Digital             

               Data Sys., Inc., 730 F.2d 1440, 1444, 221 USPQ 385, 388 (Fed. Cir. 1984).  We agree with                           

               appellants that the Oldham disclosure does not support a rejection for anticipation of the subject matter          

               of Claims 15 and 21, respectively.  Claim 15 recites, inter alia, that a channel pattern for the first driver      

               transistor and a channel pattern for the second driver transistor are symmetrical about a point, and that          

               a channel pattern for the first word transistor and a channel pattern for the second word transistor are           

               symmetrical about the point.  Oldham, however, merely shows transistors in schematic form, without                 

               the interrelated physical arrangement.  Figure 5, that pointed out by the examiner, shows driver                   

               transistors (T1, T3) and load transistors (T2, T4), but the disclosure does not detail actual physical             

               layout of all the elements.                                                                                        

                      Claim 15 also requires that “a channel pattern for [the] first load element...and a channel pattern         

               for [the] second load element...are asymmetrical.”   The examiner points to column 2, lines 40-46 of               

               Oldham for material that is believed to read on the limitation.  (See Answer, pages 3 and 6.)  Column              


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