Appeal No. 1997-3166
Application No. 08/509,638
1, line 67 through column 2, line 17, and column 2, lines 40 through 52 of the reference reveals that
load transistors (T2, T4) are designed with different channel resistances. As a given example, if
transistor T2 has a width to length ratio of 20:4, and transistor T4 has a width to length ratio of 15:4,
then the channel resistance of T2 is lower than that of T4.
The reference thus discloses load transistors T2, T4 as having different width to length ratios,
which would necessarily mean that the channel patterns for the first and second load elements are
“asymmetrical.” Thus, while the reference meets the Claim 15 limitation concerning asymmetry of the
channel patterns for the first and second load elements, the examiner has not pointed out any disclosure
of the structures that are symmetrical about a point, as required by Claim 15. We therefore do not
sustain the rejection of Claim 15. The rejection of Claims 16 and 18 is also not sustained, since each of
the claims contain at least the limitations of Claim 15.
Claim 21 recites, inter alia, that “a channel of [the] first load transistor is longer than a channel
of [the] second transistor.” However, as set forth above with respect to Claim 15, the reference’s
explicit disclosure is that the width, rather than the length, differs between the channels of the load
transistors. The lengths are disclosed as identical (i.e., four units). Whether the reference might suggest
variations in length between the two transistor channels is not at issue. The rejection is for anticipation
under 35 U.S.C. § 102. Because the reference does not disclose each and every element of Claim 21,
we do not sustain the rejection made under Section 102. (We do, however, enter a new ground of
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