Appeal No. 1997-3444
Application 08/268,728
and 'means for biasing (V , R , V and R )' including a 'meansCC C BB B
for varying (V and R )', all connected and operatingBB B
similarly as recited by Applicant" (EA3). This statement is
conclusory and makes no attempt to show how the circuit
operates as claimed. Figure 3-1 is a general transistor
circuit showing leakage currents that can operate in all modes
depending on the bias conditions. Because it is necessary to
provide some motivation to operate the circuit in a certain
way, this circuit is not an anticipation. See In re Mills,
916 F.2d 680, 682, 16 USPQ2d 1430, 1432 (Fed. Cir. 1990)
("While Mathis' apparatus may be capable of being modified to
run the way Mills' apparatus is claimed, there must be a
suggestion or motivation in the reference to do so.").
Nevertheless, since figures 2-17 (page 42) and 9-5a (page 291)
show circuits for avalanche mode operation, we analyze these
circuits.
The Examiner finds "[t]he fact that the reference teaches
the exact operation presently claimed, whether in the positive
or negative, can only be seen to be anticipation of the
invention" (EA6) and "the mere fact that this reference
teaches the 'latch-up' phenomenon can only be seen by one
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