Appeal No. 1997-3911
Application 08/368,758
The correcting information storing means 100 includes (a) a
correcting address storing unit 3 for storing the starting
addresses of defective portions of ROM 15 and (b) a correcting
content storing unit 2 for storing correcting information
therein, including the ROM addresses to be accessed after the
respective correcting operations have been completed. The
writing of the correcting information into the correcting
information storing means 100 is carried out by a loader
within ROM 15 when the electronics apparatus 1, for example,
is initialized (Spec. at 6, lines 1-4). While the external
storage means 11 is shown outside the electronics apparatus 1,
it may be provided within the electronics apparatus 1 (Spec.
at 6, lines 5-7). The switching means 200 includes an address
comparing unit 4 and an access altering unit 6. The operation
of the correction circuitry is described as follows at page 6,
lines 15-34:
The address controller 14, e.g. a CPU[,] controls the
address of the ROM 15 through the address bus 16. When
the address controller 14 reaches the correcting address
of the defective portion, two addresses input to the
comparing unit 4, i.e., an execution address from the
address bus 14 and a correcting address from the
correcting address storing unit 3, become equal and hence
the comparing unit 4 outputs an address coincidence
signal 5 to the access altering unit 6. The access
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