Appeal No. 1997-3916
Application No. 08/429,650
As to the issue of whether the buried region can be both narrower than the gate electrode and aligned4
with the gate electrode, we are not in agreement with the examiner’s statement (answer,
page 5) that the buried layer and gate electrode are not aligned because a common line or boundary
between the gate electrode and the buried layer has not been defined.
The specification (page 6, lines 3-6) states that “the invention provides a new field effect transistor
structure having a buried anti-punchthrough implant region or channel aligned to and under the gate
electrode of the FET.” We therefore find that the term “aligned” refers to the buried layer being centered
and below the gate electrode, with the buried layer being narrower than the gate electrode. We are in
agreement with appellants (brief, page 9) that the examiner’s interpretation of the term “aligned” is
inconsistent with the term as defined in the specification.
We find no teaching or suggestion in the specification to indicate that the outer edges of the buried layer
are to be in a line with the outer edges of the gate electrode in order for the buried layer and the gate
electrode to be aligned with each other. Nor is there evidence of record that the term “aligned” has a
specific meaning in the semiconductor art that would preclude the appellants from using the term “aligned”
to refer to the buried layer being narrower than the gate electrode as well as aligned with the gate
4 We note that the term “narrower” does not appear in the originally filed disclosure. However, we find
basis for use of the term “narrower” in the specification (pages 14 and 15) where it is stated that “the sidewalls 30
further narrows the self-aligned opening 34 over the gate electrode area that will be later used for implanting the
buried anti-punchthrough implant channel in the substrate under the gate electrode 22” and “The sidewall spacers
also reduce the width of the anti-punchthrough implant channel” which we find will result in the buried layer being
narrower than the gate electrode.
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