Appeal No. 1997-4115 Page 5
Application No. 08/325,765
Claim 1, which is representative for our purposes,
follows:
1. A method for generating logic for a finite
state machine, the method comprising the steps of:
(a) receiving, from a user, input which
specifies states of the finite state machine,
transition conditions between states and output
values for each state, wherein at least one output
value is unspecified for at least one state; and,
(b) generating logic for a finite state machine
from the inputs received in step (a) including, for
each output of the finite state machine, generating
an output flip-flop which stores the output, the
generating of the logic including the following
substep
(b.1) assigning values to unspecified
output values so that each state can be uniquely
identified by current values stored by the output
flip-flops and a minimum of additional flip-flops.
The references relied on in rejecting the claims follow:
Washabaugh 5,452,215 Sep. 19, 1995
(filed Aug. 24,
1994)
Chandra et al. 5,517,432 May 14,
1996.
(Chandra) (filed Jan. 31,
1994)
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