Appeal No. 1997-4127 Page 6
Application No. 08/044,241
primary boot code’ and [’] when a cycle is executed to said
other boot code or said system code.’" (Id. at 10.) The
examiner replies, “a reasonable interpretation of this part of
the claim merely requires that a reference show two memory
devices (e.g., a ROM and a FLASH EPROM as taught by Stewart)
that are enabled and disabled in a mutually exclusive manner.”
(Examiner’s Answer at 5.) He adds, “Stewart teaches such
selective enablement of two discrete memory devices, a flash
EPROM, and a ROM on a plug in card [col. 12:1-19].” (Id.) We
agree with the appellants.
The examiner errs in interpreting the claims. Each of
claims 15-17 and 19-21 specifies in pertinent part the
following limitations:
a system ROM ... for storing boot code
including primary boot code for execution by said
microprocessor upon power up of the computer system,
other boot code and other system code, said system
ROM comprising:
a flash EPROM ... for storing said
other boot code and said other system code; and
a ROM ... for storing said primary
boot code; and
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