Appeal No. 1998-1510
Application No. 08/205,737
silent on stack cache operations when there is a POP read to
the last word in the cache line and there is a cache MISS
[principal brief-page 10]. The examiner does not deny that
neither Intel nor Baum discloses the claimed limitation of
retrieving data from the main memory without copying the read
data to the cache line if the read data is not contained
within the stack cache memory and the read data corresponds to
the highest address word in the cache line. The examiner
merely attempts to explain away this difference.
From the bottom of page 4 to the first line of page 5 of
the answer, the examiner contends that the artisan would know
that if there is a MISS in the cache and the data being
accessed is the highest addressed, there is no need in storing
the data in the cache and one would bypass the cache and
provide the data directly to the CPU, preventing unnecessary
data from being stored in the cache memory. Since neither
Intel nor Baum suggests this, it appears to us that the
examiner is relying on impermissible hindsight in reaching
this conclusion.
In order to buttress his position, the examiner explains,
at pages 5-8 of the answer, with the use of drawings attached
5
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