Appeal No. 1998-2896
Application No. 08/558,564
Claim 30 is illustrative of the claimed invention, and it
reads as follows:
30. A method for forming polycide over a semiconductor
structure having an irregular upper surface, the method
comprising the steps of:
forming a first layer of non-monocrystalline silicon
over the irregular upper surface of the semiconductor
structure;
forming a dielectric layer over the first layer of
non- monocrystalline silicon;
planarizing the first layer of non-monocrystalline
silicon and the dielectric layer so as to provide the
first layer of non-monocrystalline silicon and the
dielectric layer with a substantially planar upper surface;
forming a second layer of non-monocrystalline
silicon over the planar upper surface of the first layer of
non- monocrystalline silicon and the dielectric layer;
and
forming a layer of metal silicide over the second
layer of non-monocrystalline silicon, wherein the
dielectric layer separates portions of the first and second
layers of non- monocrystalline silicon after the layer of
metal silicide is formed.
The references relied on by the examiner are:
Tamura 4,900,690 Feb. 13, 1990
Hillenius et al. (Hillenius) 4,935,376 Jun. 19,
1990
Saitoh 5,332,692 Jul. 26, 1994
Wolf, “Silicon Processing For The VLSI Era,” Volume 1: Process
Technology, 175-82 (Sunset Beach, CA, Lattice Press, 1986).
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