Ex Parte HOSAKA - Page 2



          Appeal No. 1996-2702                                                        
          Application No. 08/093,983                                                  

          and 11, was approved for entry by the Examiner.  Accordingly,               
          only the rejection of claims 4, 6, 7, 9, 10, and 12 is before us            
          on appeal.                                                                  
               The claimed invention relates to a method for forming a                
          self-aligned contact in a MOS-type semiconductor device.                    
               Claim 7 is illustrative of the invention and reads as                  
          follows:                                                                    
                    7.   A method of fabricating a MOS device, comprising             
               the steps:                                                             
                    forming a gate insulating film on a semiconductor                 
               substrate;                                                             
                    forming a gate electrode film on the gate insulating              
               film;                                                                  
                    forming a first insulating film on the gate electrode             
               film;                                                                  
                    forming a first photoresist film on the first                     
               insulating film, the first photoresist film being patterned;           
                    patterning the gate electrode film and the first                  
               insulating film by using the first patterned photoresist               
               film as a mask to form a patterned gate electrode film and             
               first insulating film which are higher than the                        
               semiconductor substrate;                                               
                    forming low concentration impurity source and drain               
               layers in a face of the semiconductor substrate by using the           
               patterned gate electrode film as a mask;                               
                    forming a second insulating film on an exposed surface            
               of the gate insulating film and the first insulating film;             

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