Appeal No. 1996-3846
Application No. 08/251,649
Here, we agree with appellants that Watanabe does not anticipate the invention as recited
in claim 37 based upon the examiner’s original rejection as recited in the answer.
Appellants argue that Watanabe does not teach or suggest “selectively preventing
communication (leakage current) between the output lines of the buffer differential
amplifiers” as recited in claim 37. (See brief at page 8.) Appellants argue that the
leakage paths shown in Appendices A and B attached to the Reply brief show the
appropriate leakage path for communication. We agree with appellants. From our review
of Watanabe and the examiner’s correlation of the disclosed elements to the claimed
invention at page 2 of the supplemental answer, we find that the examiner’s correlation is
not tenable to the invention as claimed. In the supplemental answer, the examiner relies
upon (SA3), (SA2) along with data lines D1 and D3 to achieve the common connection of
the outputs. With this statement of the rejection, the combination of the SA2, level shifter
and SA3 would have to be equated to the claimed buffer differential amplifiers, but the
examiner has not set forth this in the rejection, leaving us to speculate as to the proper
application of the prior art to the claimed invention. Moreover, if SA3 is considered the
claimed buffer differential amplifier with the outputs connected in common then its inputs
are not coupled to the pair of bit lines and if SA2 is considered the claimed buffer
differential amplifier with its inputs coupled to the pair of bit lines then its outputs are not
connected in common. Here, we agree with appellants that Watanabe does not anticipate
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