Ex parte MARUMOTO - Page 3




          Appeal No. 1998-1114                                                        
          Application 08/353,254                                                      

                                     BACKGROUND                                       
               The disclosed invention is directed to a semiconductor                 
          memory incorporating a protecting circuit to prevent data                   
          stored in a memory portion from being read out and illegally                
          copied.  The protecting circuit is shown in figure 3.  Memory               
          portion 1 is blocked from being read out to a terminal 11 by a              
          three-state buffer 4a.  Key release data is input to input                  
          register 25 via terminal 11 when the three-state buffer is in               
          a high-impedance state.  When the key release data matches                  
          stored key data in key memory 24, the flip-flop 22 is set                   
          which cancels the high-impedance state of the buffer 4a and                 
          allows data to be read.                                                     
               Claim 13 is reproduced below.                                          
                    13.  A semiconductor memory apparatus, comprising:                
                    a memory portion storing a program;                               
                    a terminal for external connection;                               
                    a three-state buffer, one end of said three-state                 
               buffer is connected to said memory portion so that said                
               three-state buffer can receive program data from said                  
               memory portion, and another end of said three-state                    
               buffer is connected to said terminal for external                      
               connection, said three-state buffer being capable of                   
               taking a high-impedance state in addition to two-value                 
               states of high-level and low-level;                                    
                    a key memory for storing key data;                                
                                        - 3 -                                         





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