Appeal No. 1998-1114
Application 08/353,254
an input register, connected to said terminal for
external connection, for storing a key release signal
received via said terminal when said three-state buffer
is in the high-impedance state;
an RS flip-flop connected to said three-state
buffer, for turning said three-state buffer into the
high-impedance state to disconnect said memory portion
from said terminal under a reset state and for canceling
the high-impedance state under a set state;
a power-on reset circuit for resetting said RS
flip-flop when a power is turned on; and
a comparator for comparing an output from said key
memory and an output from said input register to set said
RS flip-flop when the two outputs coincide.
The Examiner relies on the following prior art:
Wong et al. (Wong) 4,933,577 June 12, 1990
Yaezawa 5,377,343 December 27, 1994
The contents of Yaezawa and Wong are adequately described
by Appellant (Brief, pp. 8-9).
Claims 13-16 stand rejected under 35 U.S.C. § 103(a) as
being unpatentable over Yaezawa and Wong.
We refer to the Final Rejection (Paper No. 8) and the
Examiner's Answer (Paper No. 15) (referred to as "EA__") for a
statement of the Examiner's position, and to the Brief (Paper
No. 14) (pages referred to as "Br__") for a statement of
Appellant's arguments thereagainst.
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