Ex parte FUZISAWA et al. - Page 3




          Appeal No. 1998-3326                                       Page 3           
          Application No. 08/498,819                                                  


               The appellants’ microcomputer features a built-in SIO                  
          circuit.  The SIO circuit uses a counter to count a basic                   
          input clock signal.  Via switches and a gate, the counter                   
          supplies a transfer clock signal to an SIO register.                        
          Responsive to an external signal from another microcomputer on              
          a data bus, an initialization circuit comprising flip-flops                 
          resets the counter.  Because the initialization circuit                     
          immediately resets the counter in response to a change in the               
          external signal, delay in detection of the start bit on the                 
          bus is decreased and timing between the microcomputers is                   
          synchronized.                                                               


               Claim 9, which is representative for our purposes,                     
          follows:                                                                    
                    9.   A microcomputer comprising:                                  
                    a serial I/O register for performing data                         
               conversion;                                                            
                    a built-in serial input-output circuit                            
               comprising a resettable counter for counting a basic                   
               clock signal and supplying a transfer clock signal                     
               to the serial input-output register; and                               
                    flip-flop circuits responsive to an external                      
               signal for resetting said counter circuit.                             








Page:  Previous  1  2  3  4  5  6  7  8  9  10  Next 

Last modified: November 3, 2007