Appeal No. 1999-0153
Application No. 08/488,394
After reviewing the Staiger reference in light of the
arguments of record, we are in agreement with Appellants’
position as stated in the Brief. In our view, the Examiner’s
reliance on design considerations as a basis for the proposed
modification of Staiger is not well founded. Appellants’
disclosed intended function of applying synchronous internal
clocking signals or test clocking signals to various portions
of a circuit to be tested can only be achieved through the
circuit arrangement recited in appealed claim 1 which requires
synchronous and asynchronous clocking inputs to the two
claimed multiplexers. In our opinion, the Examiner’s finding
of the particular claimed multiplexer inputs to be merely a
design consideration is totally devoid of any support on the
record.
We also find persuasive Appellants’ further argument
(Brief, page 5) that the Examiner has unreasonably interpreted
the language of appealed claim 1 as requiring multiplexer
outputs to only a single circuit portion (an arrangement
disclosed by Staiger) rather than a plurality of circuit
portions. In the Examiner’s analysis (Answer, pages 4 and 5)
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